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About the Intel Haswell 22nm microarchitecture

 
"Tick-Tock" is a model adopted by chip manufacturer Intel Corporation since 2007 to follow every microarchitectural change with a die shrink of the process technology. Every "tick" is a shrinking of process technology of the previous microarchitecture and every "tock" is a new microarchitecture. Every year, there is expected to be one tick or tock.
We saw a Tick, that is a die shrink in Ivy Bridge (though its working issues are another thing to debate on), and we are ready to , as i posted earlier, see another tick, in the form of the upcoming 4th generation Intel Haswell 22nm  microarchitecture, to be released around March-June 2013.Haswell will be the first processor to be designed from the ground up to fully optimize the power savings and performance benefits from the move to 3D or tri-gate transistors on the 22nm process node. Haswell is also expected to double the graphics performance vs. Ivy Bridge processors bringing its performance on par with the $50 - $70 graphics cards. Intel will also use Haswell to introduce a new low power processor designed for convertible or 'hybrid' Ultrabooks which may carry a new brand name instead of the current Core brand.
 
Intel's 3-D Tri-Gate transistor uses three gates wrapped around the silicon channel in a 3-D structure, enabling an unprecedented combination of performance and energy efficiency. Intel designed the new transistor to provide unique ultra-low power benefits for use in handheld devices, like smart phones and tablets, while also delivering improved performance normally expected for high-end processors.

The new transistors are so impressively efficient at low voltages they allow the Intel® Atom™ processor design team to innovate new architectural approaches for 22nm Intel® Atom™ microarchitecture. The new design specifically maximizes the benefit of the extremely low-power 3-D Tri-Gate transistor technology. And, Intel's future SoC products based on the 22nm 3-D Tri-Gate transistors will hit sub 1 mW idle power—for incredibly low-power SoCs.
 
 

Features carried over from Ivy Bridge

  • A 22 nm manufacturing process.
  • 3D tri-gate transistors (Ivy Bridge processors and onwards).
  • A 14-stage pipeline (since the Core microarchitecture).
  • Mainstream up to quad-core.
  • Native support for dual channel DDR3.
  • 64 kB (32 kB Instruction + 32 kB Data) L1 cache and 256 kB L2 cache per core.

Confirmed new features

Expected features

  • Shrink PCH from 65 nm to 32 nm.
  • A new cache design.
  • Up to 32MB Unified cache LLC (Last Level Cache).
  • Support for Thunderbolt technology.
  • There will be three versions of the integrated GPU: GT1, GT2, and GT3. According to vr-zone, the fastest version (GT3) will have 20 execution units (EU). Another source, SemiAccurate, however says that the GT3 will have 40 EUs with an accompanying 64MB cache on an interposer. An additional source, AnandTech, agrees that GT3 will have 40 EUs, and states there will be a version with up to 128MB of embedded DRAM, but makes no mention of an interposer.Haswell's predecessor, Ivy Bridge, has a maximum of 16 EUs.
  • New advanced power-saving system.
  • Execution trace cache will be included L2 caching design.[citation needed]
  • Fully integrated voltage regulator, thereby moving a component from the motherboard onto the CPU
  • 37, 47, 57W thermal design power (TDP) mobile processors
  • 35, 45, 55, 65, 77, and ~100W+ (high-end) TDP desktop processors
  • 10W TDP processors for the Ultrabook platform (multi-chip package like Westmere). These will have reduced heat which leads to thinner as well as lighter Ultrabooks. Due to reduced Watt-usage the performance level won't be as strong as from the Ivy-bridge cpu at 17W.
 Source : wikipedia, Intel

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